About This Book 1 Review of Device Driver Concepts 2 VMEbus Architectures 3 Structure of a VMEbus Device Driver 4 Data Structures That VMEbus Device Drivers Use 5 Kernel Interfaces That VMEbus Device Drivers Use 6 VMEbus Device Driver Example 7 VMEbus Device Driver Configuration A VMEbus-Specific Reference Information B VMEbus Device Driver Source Listing C Summary Tables D Digital AXPvme Single-Board Computers and Digital Alpha VME 2100 Systems
Table of Contents
Audience
New and Changed Features
Scope of the Book
Organization
Related Documentation
Hardware Documentation
Bus-Specific Device Driver Documentation
Operating System Overview Documentation
Programming Tools Documentation
System Management Documentation
Porting Documentation
Reference Pages
Reader's Comments
Conventions
1.1 Gathering Information
1.2 Designing a Device Driver
1.3 Allocating Data Structures
1.4 Writing Portable Device Drivers
1.5 Reviewing the Device Driver Kits Delivery Process
1.6 Identifying the Method for Registering Device Interrupt Handlers
1.7 VMEbus Porting Information
2.1 VMEbus Hardware Architecture
2.1.1 Address Spaces
2.1.2 Data Sizes
2.1.3 Byte Ordering
2.1.4 Interrupt Vectors
2.1.5 Interrupt Priorities
2.2 VMEbus Software Architecture
2.2.1 VMEbus Address Space
2.2.2 Direct Memory Access Support
2.2.2.1 VMEbus-to-Host DMA
2.2.2.2 VMEbus Device-to-Device DMA
2.2.2.3 Rules for Performing DMA on Multiple VMEbus Adapters
2.2.3 I/O Access
2.2.4 Writes to the Hardware Device Register
3.1 Include Files Section
3.2 Autoconfiguration Support Section
3.2.1 Setting Up the probe Interface
3.2.2 Setting Up the slave Interface
4.1 The controller Structure Members as Specified on the VMEbus
4.2 The driver Structure Members Specific to the VMEbus
5.1 Allocating Resources for Direct Memory Access Data Transfers
5.2 Unloading System Direct Memory Access Resources
5.3 Obtaining the VMEbus Address
5.4 Reading and Writing Data from a Device Register
5.5 Passing Mechanism for the busphys_to_iohandle Interface.
6.1 The dmaexreg.h Header File
6.2 Include Files Section
6.3 Declarations Section
6.4 Autoconfiguration Support Section
6.5 Open and Close Device Section
6.5.1 Implementing the dmaexopen Interface
6.5.2 Implementing the dmaexclose Interface
6.6 Read and Write Device Section
6.6.1 Implementing the dmaexread Interface
6.6.2 Implementing the dmaexwrite Interface
6.6.3 Implementing the dmaexminphys Interface
6.7 Strategy Section
6.8 Interrupt Section
6.9 Timeout Section
A.1 Conventions for Reference (man) Pages
A.1.1 Conventions for Header File
A.1.2 Conventions for Kernel Interfaces
A.1.3 Conventions for Data Structures
A.1.4 Conventions for Device Driver Interfaces
A.2 Header File
vbareg.h
A.3 Kernel Interfaces
vba_clear_irq
vba_display_addr_type
vba_dma
vba_get_dma_addr
vba_get_vmeaddr
vba_get_vmeaddr_am
vba_map_csr
vba_post_irq
vba_set_dma_addr
vba_unmap_csr
A.4 Data Structures
controller
driver
vme_handler_info
A.5 Device Driver Interfaces
xxprobe
xxslave
C.1 List of Header Files
C.2 List of Kernel Support Interfaces
C.3 ioctl Commands
C.4 List of Global Variables
C.5 List of Data Structures
C.6 List of Device Driver Interfaces
C.7 List of Bus Configuration Interfaces
D.1 Configuration Instructions
D.1.1 Configuring the VMEbus Adapter
D.1.2 Specifying the VMEbus Request Level
D.1.3 Specifying the VIC Arbitration Mode
D.1.4 Specifying the VMEbus Fairness Timer
D.1.5 Specifying the Local Bus Acquisition and VMEbus Arbitration Timeouts
D.1.6 Specifying the VMEbus Release Mode
D.1.7 Specifying the VMEbus System Controller
D.1.8 Receipt of VMEbus Resets
D.1.8.1 Receipt of VMEbus Resets on Digital VME 2100 Systems
D.1.8.2 Receipt of VMEbus Resets on Digital AXPvme SBC Systems
D.1.9 Setting VMEbus Master Write Posting
D.1.10 Setting VMEbus Address Space Parameters
D.1.10.1 A32 and A24 Address Spaces
D.1.10.1.1 A32 and A24 Address Space Overlapping
D.1.10.1.2 Configuring Window Size for A32 and A24 Address Spaces
D.1.10.1.3 Configuring Base Address for A32 Address Spaces
D.1.10.1.4 Configuring Base Address for A24 Address Spaces
D.1.10.2 Configuring the A16 Interprocessor Communication Facilities Address Space
D.1.11 VMEbus and VME Adapter Interrupt Request Levels
D.1.12 Setting VMEbus Interrupt Vector Parameters
D.1.12.1 Specifying VMEbus Interrupt Vectors and Interrupt Request Levels
D.1.12.2 Specifying Autovector Interrupt Vectors
D.1.12.3 Specifying Module Switch Interrupt Vectors
D.1.12.4 Specifying Global Switch Interrupt Vectors
D.1.13 Using VMEbus Byte-Swap Modes
D.1.13.1 VME_BS_NOSWAP Mode
D.1.13.2 VME_BS_BYTE Mode
D.1.13.3 VME_BS_WORD Mode
D.1.13.4 VME_BS_LWORD Mode
D.1.13.5 Shared Memory Between Big Endian and Little Endian Processors
D.2 VMEbus Slave Block Transfers
D.3 VMEbus Master Block Transfers with Local DMA
D.3.1 Digital UNIX Interfaces for Master Block-Mode Transfer
D.3.2 Restrictions on VMEbus Master Block Transfers with Local DMA
D.4 Realtime Interrupt-Handling Function
D.5 VMEbus Backplane Network Driver
D.5.1 DECnet Support
D.5.2 VB Driver Concepts
D.5.2.1 VMEbus Address Use by the VB Driver
D.5.2.1.1 VMEbus Addresses Used for Mapping Data
D.5.2.1.2 VMEbus Addresses Used for Interrupting
D.5.2.2 Box Manager Node
D.5.2.3 Network Participation
D.5.3 Configuring the VB Network Driver
D.5.3.1 Editing the if_vb_data.c File
D.5.3.1.1 Per-Node Configurable Data
D.5.3.1.2 Per-Network Configurable Data
D.5.3.2 Editing the ebv10_vme_data.c File
D.5.4 Summary of Configuration Steps
D.5.5 Adding the VB Driver to an AXPvme SBC or Digital Alpha VME 2100
D.5.6 Registering the VB Driver as a Network Device
Figures
2-1 VMEbus Address Space
2-2 VMEbus-to-Host DMA (Read and Write Operations)
2-3 Programmed I/O
3-1 Sections of a Character Device Driver and a Block Device Driver