A Instruction Summaries

The tables in this appendix summarize the assembly language instruction set:

Table A-1 summarizes the main instruction set.

Table A-2 summarizes the floating-point instruction set.

Table A-3 summarizes the rounding and trapping modes supported by some floating-point instructions.

Most of the assembly language instructions translate into single instructions in machine code.

The tables in this appendix show the format of each instruction in the main instruction set and the floating-point instruction set. The tables list the instruction names and the forms of operands that can be used with each instruction. The specifiers used in the tables to identify operands have the following meanings:

Operand Specifier	Description
`address`	A symbolic expression whose effective value is used as an address.
`b_reg`	Base register. A register containing a base address to which is added an offset (or displacement) value to produce an effective address.
`d_reg`	Destination register. A register that receives a value as a result of an operation.
`d_reg/s_reg`	One register that is used as both a destination register and a source register.
`label`	A label that identifies a location in a program.
`no_operands`	No operands are specified.
`offset`	An immediate value that is added to the contents of a base register to calculate an effective address.
`palcode`	A value that determines the operation performed by a PAL instruction.
`s_reg, s_reg1, s_reg2`	Source registers. Registers whose contents are to be used in an operation.
`val_expr`	An expression whose value is used as an absolute value.
`val_immed`	An immediate value that is to be used in an operation.
`jhint`	An address operand that provides a hint of where a `jmp` or `jsr` instruction will transfer control.
`rhint`	An immediate operand that provides software with a hint about how a `ret` or `jsr_coroutine` instruction is used.

The tables in this appendix are segmented into groups of instructions that have the same operand options; the operands specified within a particular segment of the table apply to all of the instructions contained in that segment.

Table A-1: Main Instruction Set Summary

Instruction	Mnemonic	Operands
Load Address	`lda` ^{[Footnote 4]}	`d_reg, address`
Load Byte	`ldb`
Load Byte Unsigned	`ldbu`
Load Word	`ldw`
Load Word Unsigned	`ldwu`
Load Sign Extended Longword	`ldl` ^{[Footnote 4]}
Load Sign Extended Longword Locked	`ldl_l` ^{[Footnote 4]}
Load Quadword	`ldq` ^{[Footnote 4]}
Load Quadword Locked	`ldq_l` ^{[Footnote 4]}
Load Quadword Unaligned	`ldq_u` ^{[Footnote 4]}
Load Unaligned Word	`uldw`
Load Unaligned Word Unsigned	`uldwu`
Load Unaligned Longword	`uldl`
Load Unaligned Quadword	`uldq`
Store Byte	`stb`	`s_reg, address`
Store Word	`stw`
Store Longword	`stl` ^{[Footnote 4]}
Store Longword Conditional	`stl_c` ^{[Footnote 4]}
Store Quadword	`stq` ^{[Footnote 4]}
Store Quadword Conditional	`stq_c` ^{[Footnote 4]}
Store Quadword Unaligned	`stq_u` ^{[Footnote 4]}
Store Unaligned Word	`ustw`
Store Unaligned Longword	`ustl`
Store Unaligned Quadword	`ustq`
Load Address High	`ldah` ^{[Footnote 4]}	`d_reg,offset` (`b_reg`)
Load Global Pointer	`ldgp`	`d_reg,offset` (`b_reg`)
Load Immediate Longword	`ldil`	`d_reg,val_expr`
Load Immediate Quadword	`ldiq`
Branch if Equal to Zero	`beq`	`s_reg,label`
Branch if Not Equal to Zero	`bne`
Branch if Less Than Zero	`blt`
Branch if Less Than or Equal to Zero	`ble`
Branch if Greater Than Zero	`bgt`
Branch if Greater Than or Equal to Zero	`bge`
Branch if Low Bit is Clear	`blbc`
Branch if Low Bit is Set	`blbs`
Branch	`br`	`d_reg,label` or `label`
Branch to Subroutine	`bsr`	`d_reg,label` or `label`
Jump	`jmp` ^{[Footnote 4]}	`d_reg,(s_reg),jhint` or `d_reg,(s_reg)` or `(s_reg),jhint` or `(s_reg)` or `d_reg,address` or `address`
Jump to Subroutine	`jsr` ^{[Footnote 4]}
Return from Subroutine	`ret`	`d_reg,(s_reg),rhint` or `d_reg,(s_reg)` or `d_reg,rhint` or `d_reg` or `(s_reg),rhint` or `(s_reg)` or `rhint` or `no_operands`
Jump to Subroutine Return	`jsr_coroutine` ^{[Footnote 4]}
Architecture Mask	`amask`	`s_reg,d_reg` or `val_immed,d_reg`
Clear	`clr`	`d_reg`
Implementation Version	`implver`
Absolute Value Longword	`absl`	`s_reg,d_reg` or `d_reg/s_reg` or `val_immed,d_reg`
Absolute Value Quadword	`absq`
Move	`mov`
Negate Longword (without overflow)	`negl`
Negate Longword (with overflow)	`neglv`
Negate Quadword (without overflow)	`negq`
Negate Quadword (with overflow)	`negqv`
Logical Complement (NOT)	`not`
Sign-Extension Byte	`sextb`
Sign-Extension Longword	`sextl`
Sign-Extension Word	`sextw`
Add Longword (without overflow)	`addl`	`s_reg1,s_reg2,d_reg` or `d_reg/s_reg1,s_reg2` or `s_reg1,val_immed,d_reg` or `d_reg/s_reg1,val_immed`
Add Longword (with overflow)	`addlv`
Add Quadword (without overflow)	`addq`
Add Quadword (with overflow)	`addqv`
Scaled Longword Add by 4	`s4addl`
Scaled Quadword Add by 4	`s4addq`
Scaled Longword Add by 8	`s8addl`
Scaled Quadword Add by 8	`s8addq`
Compare Signed Quadword Equal	`cmpeq`
Compare Signed Quadword Less Than	`cmplt`
Compare Signed Quadword Less Than or Equal	`cmple`
Compare Unsigned Quadword Less Than	`cmpult`
Compare Unsigned Quadword Less Than or Equal	`cmpule`
Multiply Longword (without overflow)	`mull`
Multiply Longword (with overflow)	`mullv`
Multiply Quadword (without overflow)	`mulq`
Multiply Quadword (with overflow)	`mulqv`
Subtract Longword (without overflow)	`subl`
Subtract Longword (with overflow)	`sublv`
Subtract Quadword (without overflow)	`subq`
Subtract Quadword (with overflow)	`subqv`
Scaled Longword Subtract by 4	`s4subl`
Scaled Quadword Subtract by 4	`s4subq`
Scaled Longword Subtract by 8	`s8subl`
Scaled Quadword Subtract by 8	`s8subq`
Scaled Quadword Subtract by 8	`s8subq`
Unsigned Quadword Multiply High	`umulh`
Divide Longword	`divl`
Divide Longword Unsigned	`divlu`
Divide Quadword	`divq`
Divide Quadword Unsigned	`divqu`
Longword Remainder	`reml`
Longword Remainder Unsigned	`remlu`
Quadword Remainder	`remq`
Quadword Remainder Unsigned	`remqu`
Logical Product (AND)	`and`
Logical Sum (OR)	`bis`
Logical Sum (OR)	`or`
Logical Difference (XOR)	`xor`
Logical Product with Complement (ANDNOT)	`bic`
Logical Product with Complement (ANDNOT)	`andnot`
Logical Sum with Complement (ORNOT)	`ornot`
Logical Equivalence (XORNOT)	`eqv`
Logical Equivalence (XORNOT)	`xornot`
Move if Equal to Zero	`cmoveq`
Move if Not Equal to Zero	`cmovne`
Move if Less Than Zero	`cmovlt`
Move if Less Than or Equal to Zero	`cmovle`
Move if Greater Than Zero	`cmovgt`
Move if Greater Than or Equal to Zero	`cmovge`
Move if Low Bit Clear	`cmovlbc`
Move if Low Bit Set	`cmovlbs`
Shift Left Logical	`sll`
Shift Right Logical	`srl`
Shift Right Arithmetic	`sra`
Compare Byte	`cmpbge`
Extract Byte Low	`extbl`
Extract Word Low	`extwl`
Extract Longword Low	`extll`
Extract Quadword Low	`extql`
Extract Word High	`extwh`
Extract Longword High	`extlh`
Extract Quadword High	`extqh`
Insert Byte Low	`insbl`
Insert Word Low	`inswl`
Insert Longword Low	`insll`
Insert Quadword Low	`insql`
Insert Word High	`inswh`
Insert Word High	`inswh`
Insert Longword High	`inslh`
Insert Quadword High	`insqh`
Mask Byte Low	`mskbl`
Mask Word Low	`mskwl`
Mask Longword Low	`mskll`
Mask Quadword Low	`mskql`
Mask Word High	`mskwh`
Mask Longword High	`msklh`
Mask Quadword High	`mskqh`
Zero Bytes	`zap`
Zero Bytes NOT	`zapnot`
Call Privileged Architecture Library	`call_pal`	`palcode`
Prefetch Data	`fetch`	`offset` (`b_reg`)
Prefetch Data, Modify Intent	`fetch_m`
Read Process Cycle Counter	`rpcc`	`d_reg`
No Operation	`nop`	`no_operands`
Universal No Operation	`unop`
Trap Barrier	`trapb`
Exception Barrier	`excb`
Memory Barrier	`mb`
Write Memory Barrier	`wmb`

A number of the floating-point instructions in Table A-2 support qualifiers that control rounding and trapping modes. Table notes identify the qualifiers that can be used with a particular instruction. (The notes also identify the instructions on which relocation operands can be specified.)

Qualifiers are appended as suffixes to the particular instructions that support them; for example, the instruction cvtdg with the sc qualifier would be coded cvtdgsc.

The qualifier suffixes consist of one or more characters, with each character identifying a particular rounding or trapping mode. Table A-3 defines the rounding or trapping modes associated with each character.

Table A-2: Floating-Point Instruction Set Summary

Instruction	Mnemonic	Operands
Load F_Floating	`ldf` ^{[Footnote 5]}	`d_reg,address`
Load G_Floating (Load D_Floating)	`ldg` ^{[Footnote 5]}
Load S_Floating (Load Longword)	`lds` ^{[Footnote 5]}
Load T_Floating (Load Quadword)	`ldt` ^{[Footnote 5]}
Store F_Floating	`stf` ^{[Footnote 5]}	`s_reg,address`
Store G_Floating (Store D_Floating)	`stg` ^{[Footnote 5]}
Store S_Floating (Store Longword)	`sts` ^{[Footnote 5]}
Store T_Floating (Store Quadword)	`stt` ^{[Footnote 5]}
Load Immediate F_Floating	`ldif`	`d_reg, val_expr`
Load Immediate D_Floating	`ldid`
Load Immediate G_Floating	`ldig`
Load Immediate S_Floating	`ldis`
Load Immediate T_Floating	`ldit`
Branch Equal to Zero	`fbeq`	`s_reg, label` or `label`
Branch Not Equal to Zero	`fbne`
Branch Less Than Zero	`fblt`
Branch Less Than or Equal to Zero	`fble`
Branch Greater Than Zero	`fbgt`
Branch Greater Than or Equal to Zero	`fbge`
Floating Clear	`fclr`	`d_reg`
Floating Move	`fmov`	`s_reg, d_reg` or `d_reg/s_reg`
Floating Negate	`fneg`
Floating Absolute Value	`fabs`
Negate F_Floating	`negf` ^{[Footnote 6]}
Negate G_Floating	`negg` ^{[Footnote 6]}
Negate S_Floating	`negs` ^{[Footnote 7]}
Negate T_Floating	`negt` ^{[Footnote 7]}
Copy Sign	`cpys`	`s_reg1, s_reg2, d_reg` or `d_reg/s_reg1, s_reg2`
Copy Sign Negate	`cpysn`
Copy Sign and Exponent	`cpyse`
Move if Equal to Zero	`fcmoveq`
Move if Not Equal to Zero	`fcmovne`
Move if Less Than Zero	`fcmovlt`
Move if Less Than or Equal to Zero	`fcmovle`
Move if Greater Than Zero	`fcmovgt`
Move if Greater Than or Equal to Zero	`fcmovge`
Add F_Floating	`addf` ^{[Footnote 8]}
Add G_Floating	`addg` ^{[Footnote 8]}
Add S_Floating	`adds` ^{[Footnote 9]}
Add T_Floating	`addt` ^{[Footnote 9]}
Compare G_Floating Equal	`cmpgeq` ^{[Footnote 6]}
Compare G_Floating Less Than	`cmpglt` ^{[Footnote 6]}
Compare G_Floating Less Than or Equal	`cmpgle` ^{[Footnote 6]}
Compare T_Floating Equal	`cmpteq` ^{[Footnote 7]}
Compare T_Floating Less Than	`cmptlt` ^{[Footnote 7]}
Compare T_Floating Less Than	`cmptlt` ^{[Footnote 7]}
Compare T_Floating Unordered	`cmptun` ^{[Footnote 7]}
Compare T_Floating Less Than or Equal	`cmptle` ^{[Footnote 7]}
Divide F_Floating	`divf` ^{[Footnote 8]}
Divide G_Floating	`divg` ^{[Footnote 8]}
Divide S_Floating	`divs` ^{[Footnote 9]}
Divide T_Floating	`divt` ^{[Footnote 9]}
Multiply F_Floating	`mulf` ^{[Footnote 8]}
Multiply G_Floating	`mulg` ^{[Footnote 8]}
Multiply S_Floating	`muls` ^{[Footnote 9]}
Multiply T_Floating	`mult` ^{[Footnote 9]}
Subtract F_Floating	`subf` ^{[Footnote 8]}
Subtract G_Floating	`subg` ^{[Footnote 8]}
Subtract S_Floating	`subs` ^{[Footnote 9]}
Subtract T_Floating	`subt` ^{[Footnote 9]}
Convert Quadword to Longword	`cvtql` ^{[Footnote 10]}	`s_reg, d_reg` or `d_reg/s_reg`
Convert Longword to Quadword	`cvtlq`
Convert G_Floating to Quadword	`cvtgq` ^{[Footnote 11]}
Convert T_Floating to Quadword	`cvttq` ^{[Footnote 12]}
Convert Quadword to F_Floating	`cvtqf` ^{[Footnote 13]}
Convert Quadword to G_Floating	`cvtqg` ^{[Footnote 13]}
Convert Quadword to S_Floating	`cvtqs` ^{[Footnote 14]}
Convert Quadword to T_Floating	`cvtqt` ^{[Footnote 14]}
Convert D_Floating to G_Floating	`cvtdg` ^{[Footnote 8]}
Convert G_Floating to D_Floating	`cvtgd` ^{[Footnote 8]}
Convert G_Floating to F_Floating	`cvtgf` ^{[Footnote 8]}
Convert T_Floating to S_Floating	`cvtts` ^{[Footnote 9]}
Convert S_Floating to T_Floating	`cvtst` ^{[Footnote 6]}
Move From FP Control Register	`mf_fpcr`	`d_reg`
Move To FP Control Register	`mt_fpcr`	`s_reg`
Floating No Operation	`fnop`	`no_operands`

See the text immediately preceding Table A-2 for a description of the table notes.

Table A-3: Rounding and Trapping Modes

Suffix	Description
`(no suffix)`	Normal rounding
`c`	Chopped rounding
`d`	Dynamic rounding
`m`	Minus infinity rounding
`s`	Software completion
`u`	Underflow trap enabled
`v`	Integer overflow trap enabled
`i`	Inexact trap enabled