FIX: LNK1170 Building Project's Makefile from Command Line (156190)

WORKAROUND

There are two workarounds:

Workaround 1: A New Makefile

Copy the project makefile and edit the copy. The object modules are listed in the LINK32_OBJS macro. To work around the problem, use macro substitution to insert newline charaters after each object module so that each object module is specified on a separate line. You need to use the following macro substitution in your project makefile:

   $(LINK32_OBJS:"  "="^
   ")
					

For example, a typical link line in a makefile looks similar to the following:

   "$(OUTDIR)\anapp.exe" : "$(OUTDIR)" $(DEF_FILE) $(LINK32_OBJS)
       $(LINK32) @<<
    $(LINK32_FLAGS) $(LINK32_OBJS)
   <<
				

Change the third line of the above sample to the following:

   "$(OUTDIR)\anapp.exe" : "$(OUTDIR)" $(DEF_FILE) $(LINK32_OBJS)
       $(LINK32) @<<
    $(LINK32_FLAGS) $(LINK32_OBJS:"  "="^
   ")
   <<
					

NOTE: Two white spaces between the initial set of quotes.

You need to use the workaround for both the debug build and the release build of your project. If you have any other project configurations, you need to apply the workaround to those as well.

Then use NMAKE on the new makefile to build your project.

Workaround 2: Static Libraries

Break up your project into a main top-level project and several static libraries as sub-projects. Static libraries are simply a collection of object modules. You can organize your project into several such collections, but you must have at least one module in your top-level project--the one containing the entry point of your program.