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mb(9r)
NAME
  mb - General: Performs a memory barrier

SYNOPSIS
  void mb(
	  void );

ARGUMENTS
  None

DESCRIPTION
  The Alpha architecture does not guarantee read/write ordering.  That is,
  the memory subsystem is free to complete read and write operations in any
  order that is optimal, without regard for the order in which they were
  issued. Read/write ordering is not the same as cache coherency, which is
  handled separately and is not an issue. The Alpha architecture also
  contains a write buffer (as do many high-performance RISC CPUs, including
  the MIPS R3000). This write buffer can coalesce multiple writes to
  identical or adjacent addresses into a single write, effectively losing
  earlier write requests.  Similarly, multiple reads to the same identical or
  adjacent addresses can be coalesced into a single read.

  This coalescing has implications for multiprocessor systems, as well as
  systems with off-board I/O or DMA engines that can read or modify memory
  asynchronously or that can require multiple writes to actually issue
  multiple data items. The mb (memory barrier) routine guarantees ordering of
  operations. The mb routine is derived from the MB instruction, which is
  described in the Alpha Architecture Reference Manual.	 The mb routine is a
  superset of the wbflush routine that ULTRIX drivers use. For compatibility,
  wbflush is aliased to mb on Tru64 UNIX Alpha systems.

  You call mb in a device driver under the following circumstances:

    ·  To force a barrier between load/store operations

    ·  After the CPU has prepared a data buffer in memory and before the
       device driver tries to perform a DMA out of the buffer

    ·  Before attempting to read any device CSRs after taking a device
       interrupt

    ·  Between writes

  Device drivers and the operating system are the primary users of the mb
  routine. However, some user programs, such as a graphics program that
  directly maps the frame buffer and manipulates registers, might need to
  call mb. The operating system does not provide a C library routine for mb.
  User programs that require use of mb should use the following asm
  construct:

       #include <c_asm.h>

       asm ("mb");

NOTES
  In most situations that would require a cache flush on other CPU
  architectures, you should call the mb routine on Tru64 UNIX Alpha systems.
  The reason is not that mb is equivalent to a cache flush (as it is not).
  Rather, a common reason for doing a cache flush is to make data that the
  host CPU wrote available in main memory for access by the DMA device or to
  access from the host CPU data that was put in main memory by a DMA device.
  In each case, on an Alpha CPU you should use a memory barrier to
  synchronize with that event.

  One example of using mb occurs with an Ethernet network controller. Each
  Ethernet network controller has a unique Ethernet hardware address that is
  typically contained in a ROM on the Ethernet controller board. The Ethernet
  hardware address is a multibyte sequence typically consisting of at least
  10 bytes. This multibyte Ethernet hardware address is frequently read from
  the controller hardware by the driver's probe routine by issuing a sequence
  of reads to the same controller register. Each successive read returns the
  next byte of the Ethernet hardware address. In such instances, a call to mb
  should be inserted between each of these read operations to ensure that
  successive read operations are not coalesced into fewer actual reads as
  seen by the Ethernet controller.

RETURN VALUES
  None

Index for Section 9r

Alphabetical listing for M

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