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ARM
Options
The following -m
options are defined for Advanced RISC Machines (ARM) architectures.
-mapcs-frame
Generate a stack
frame that is compliant with the ARM Procedure Call Standard for all functions,
even if this is not strictly necessary for correct execution of the code.
-mapcs-26
Generate code
for a processor running with a 26-bit program counter, and conforming to
the function calling standards for the APCS 26-bit option. This option
replaces the -m2
and -m3
options of previous releases of the compiler.
-mapcs-32
Generate code
for a processor running with a 32-bit program counter, and conforming to
the function calling standards for the APCS 32-bit option. This option
replaces the -m6
option of previous releases of the compiler.
-mhard-float
Generate output
containing floating point instructions. This is the default.
-msoft-float
Generate output
containing library calls for floating point.
- Warning:
The requisite libraries are not available for all ARM targets.
Normally the facilities of the machines usual C compiler are used, but
this cannot be done directly in cross-compilation. You must make your own
arrangements to provide suitable library functions for cross-compilation.
-msoft-float
changes the calling convention in the output file; therefore, it is only
useful if you compile all of a program with this option. In particular,
you need to compile libgcc.a,
the library that comes with GNU CC, with -msoft-float
in order for this to work.
-mlittle-endian
Generate code
for a processor running in little-endian mode. This is the default for
all standard configurations.
-mbig-endian
Generate code
for a processor running in big-endian mode; the default is to compile code
for a little-endian processor.
-mwords-little-endian
This option only
applies when generating code for big-endian processors. Generate code for
a little-endian word order but a big-endian byte order. That is, a byte
order of the form, 32107654.
- Note:
This option should only be used if you require compatibility with code
for big-endian ARM processors generated by versions of the compiler prior
to 2.8.
-mshort-load-bytes
Do not try to
load half-words (e.g., short)
by loading a word from an unaligned address. For some targets the MMU is
configured to trap unaligned loads; use this option to generate code that
is safe in these environments.
-mno-short-load-bytes
Use unaligned
word loads to load half-words (e.g., shorts).
This option produces more efficient code, but the MMU is sometimes configured
to trap these instructions.
-mbsd
This option only
applies to RISC iX. Emulate the native BSD-mode compiler. This is the default
if -ansi
is not specified.
-mxopen
This option only
applies to RISC iX. Emulate the native X/Open-mode compiler.
-mno-symrename
This option only
applies to RISC iX. Do not run the assembler post-processor, symrename,
after code has been assembled. Normally it is necessary to modify some
of the standard symbols in preparation for linking with the RISC iX C library;
this option suppresses this pass. The post-processor is never run when
the compiler is built for cross-compilation.